Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage Solution
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)
KAIST, University of Illinois Urbana-Champaign, Pennsylvania State University
Motivation
•최근 위와 같은 Larger Scale Application이 대폭 증가.
Related Works
HW Solution
•NVDIMM-N : Back up data from DRAM to flash during power failure
Capacity : X Performance : O
Non-volatility : O Power consumption : X
•NVDIMM-P persistent mode : Replace DRAM with storage class memory
Capacity : O Performance : X
Non-volatility : O Power consumption : O
•Ultra-low-latency(ULL) SSD: high-performance flash memory;
•Compared to NVMe SSD, ULL-Flash reduces the latency by 95%
•But, ULL SSD (3us) costs longer latency than DRAM(100ns)
SW Solution
•Memory mapped I/O file(MMF) : expand memory space with SSD
•Challenge : SSD expose block interface, which cannot be accessed by CPU via load/store inst directly
•Solution : leverage the operating system to migrate data between memory and storage
Capacity : O Performance : X
Non-volatility : X Power consumption : O
Challenge of MMF
•Performance issue : software stack becomes the dominant factor that impacts the MMF-based system.
•Software Overhead
•Page fault handling •PTE construction overhead
•Multiple system calls •Context switching
•TLB miss latency
•Data persistent issue:
•Traditional DRAM is volatile memory
•The atomicity and consistency of I/O transaction is protected by software stack including MMF and filesystem
Proposed Techniques
Overview of HAMS
•HAMS : solution for performance and persistency
•Employ NVDIMM-N as inclusive cache and ULL-SSD as the backend
•Hardware automation to make data migration transparent to OS
•Build a persistent memory by making I/O transaction persistent
Impletation of HAMS
•HAMS controller : a uniform controller to manage the memory controller and PCIe root complex
•NVMe queue engine : implement a simplified NVMe driver in H/W
•Address manager : arbitrate memory request based on a tag array
•Tag array design in address manager
•Logical address stored in MMU cannot be referred as page location
•Pseudo-LRU page reclaim scheme also cannot be applied
•Target : simple and zero-overhead
•Construct NVDIMM as directed-map cache
•Integrate tags into the data array
•Enable persistency in the HAMS memory system:
NVDIMM : O ULL-Flash : O I/O transaction : X
•Challenge : metadata of NVMe queue engine is vulnerable to unintentional overwritten by user application or OS
•Solution : Allocate MMU-invisible memory region to store metadata and pin the region to NVDIMM
•Challenge 2 : vulnerable to power failure
•Solution : power failure recovery approach
•Challenge : physical hardware boundary and redundant data copies
•Aggressive HAMS : remove SSD internal DRAM and attach to DDR PHY
Evaluation
